Template:DRAM - Revision history

Indicwiki: 1 revision imported from :alpha:Template:DRAM

2023-06-11T03:15:00Z

1 revision imported from alpha:Template:DRAM

← Older revision	Revision as of 08:45, 11 June 2023
(No difference)

alpha>Indicwiki: Created page with "{{Navbox | name = DRAM | title = Dynamic random-access memory (DRAM) | listclass = hlist | state = {{{state|autocollapse}}} | group1 = Asynchronous | list1..."

2023-02-06T06:22:02Z

Created page with "{{Navbox | name = DRAM | title = Dynamic random-access memory (DRAM) | listclass = hlist | state = {{{state|autocollapse}}} | group1 = Asynchronous | list1..."

← Older revision		Revision as of 11:52, 6 February 2023
Line 52:		Line 52:
	* [[DIMM]]		* [[DIMM]]
	* [[UniDIMM]]		* [[UniDIMM]]
			* [[Compression Attached Memory Module\|CAMM]]

	\| group10 = Lists		\| group10 = Lists

Manidh: 1 revision imported

2023-01-07T14:59:47Z

1 revision imported

← Older revision	Revision as of 20:29, 7 January 2023
(No difference)

wikipedia>LengthyMer: Added HBM-PIM entry into the HBM sublist.

2022-12-23T14:15:58Z

Added HBM-PIM entry into the HBM sublist.

New page

{{Navbox
| name = DRAM
| title = [[Dynamic random-access memory]] (DRAM)
| listclass = hlist
| state = {{{state|autocollapse}}}

| group1 = Asynchronous
| list1 =
* [[FPM RAM]]
* [[EDO RAM]]

| group2 = [[Synchronous dynamic random-access memory|Synchronous]]
| list2 =
* [[Synchronous dynamic random-access memory|SDRAM]]
* [[DDR SDRAM]]
** [[DDR2 SDRAM|DDR2]]
** [[DDR3 SDRAM|DDR3]]
** [[DDR4 SDRAM|DDR4]]
** [[DDR5 SDRAM|DDR5]]
* [[LPDDR]] (Mobile DDR)
* [[Fast Cycle DRAM]] (FCRAM) 
* [[eDRAM]]
* [[RLDRAM]]
* [[High Bandwidth Memory|HBM]]
** [[High Bandwidth Memory#HBM2|HBM2]]
** [[High Bandwidth Memory#HBM3|HBM3]]
** [[High Bandwidth Memory#HBM-PIM|HBM-PIM]]
* [[Hybrid Memory Cube]]

| group5 = Graphics
| list5 =
* [[Video RAM (dual-ported DRAM)|VRAM]]
* [[WRAM (memory)|WRAM]]
* [[MDRAM]]
* [[SGRAM]]
** [[GDDR SDRAM|GDDR]]
** [[GDDR2]]
** [[GDDR3 SDRAM|GDDR3]]
** [[GDDR4 SDRAM|GDDR4]]
** [[GDDR5 SDRAM|GDDR5]]
** [[GDDR6 SDRAM|GDDR6]]

| group8 = [[Rambus]]
| list8 =
* [[RDRAM]]
* [[XDR DRAM]]
* [[XDR2 DRAM]]

| group9 = [[Memory module]]s
| list9 =
* [[SIMM]]
* [[DIMM]]
* [[UniDIMM]]

| group10 = Lists
| list10 =
* [[Random-access memory#DRAM|DRAM timeline]]
* [[Synchronous dynamic random-access memory#Timeline|SDRAM timeline]]
* [[List of interface bit rates#Dynamic random-access memory|Bandwidth]]
* [[Transistor count#Memory|Transistor count]]

}}<noinclude>
{{documentation}}
</noinclude>